Edge neural inference
Run convolution and matrix operations in gateways, cameras and industrial devices.
Advanced prototypePost-Digital Primer 05
The opportunity is to reduce data movement and exploit device physics for selected operations. The penalty is precision, variability and programmability.
Why it matters
Moving data between memory and processors is a major energy and latency cost in AI and signal processing. Computational memory could reduce that burden in edge equipment and datacentres if converters, variability and software do not erase the gain.
What it is
In-memory computing performs operations inside or next to storage arrays instead of repeatedly moving data to a processor. Analog computing represents quantities continuously and lets voltages, currents, charge or waves perform mathematical operations directly.
What it is not
The categories overlap but are not identical. A digital near-memory accelerator may avoid analog uncertainty; an analog RF computer may have no memory array. Device-level TOPS/W figures often omit converters, control and error correction.
Telecoms read-acrossData movement is a genuine energy bottleneck. Credible systems use analog or in-memory blocks for stable, repeated calculations while conventional processors retain control, precision and software compatibility.
How it works
Store model settings as electrical conductance, charge or magnetic states inside an array that can also perform calculations.
Encode data as voltages, currents or RF signals across rows or channels.
The array performs many multiplications and additions in parallel, which are common operations in AI models.
Converters and digital logic calibrate and handle operations requiring greater precision.
Use cases
Status labels show use-case maturity.
Run convolution and matrix operations in gateways, cameras and industrial devices.
Advanced prototypeExtract compact features before data reaches a conventional processor or network.
Plausible near termUse mixers, propagation or antenna arrays to perform portions of inference.
ResearchUse specialist arrays for repeated workloads where the setup cost can be spread across many calculations.
Early product pathTelecom relevance
Accelerate stable models while retaining a general processor for updates and unsupported operations.
Investigate estimation and classification but isolate experiments from deterministic loops.
Evaluate memory bandwidth, update frequency and utilisation before assuming lower cost.
Design around converter energy, endurance, calibration and software.
Reality check
These questions test whether the technology can become a practical, supportable system.