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It remains unclear whether quantum computing was used operationally or only within a trial or planning exercise. The initial network-optimisation workload may have modelled possible interventions rather than directly controlling or changing a live network. That distinction matters when judging the maturity of the deployment. Nevertheless, quantum computing has significant longer-term potential for solving complex, multivariable network-optimisation problems that become difficult to handle efficiently using conventional approaches.

The key point is that quantum teleportation appears to perform better over hollow-core fibre than over conventional solid-core fibre. The research also suggests that quantum communications could eventually coexist with classical optical transport, rather than always requiring completely separate dedicated connections. However, hollow-core fibre remains rare, comparatively immature and more difficult to deploy at scale. If it proves better suited to future quantum applications as well as conventional traffic, that additional future-proofing could strengthen its investment case.

This work starts to address the operational challenges of deploying quantum entanglement at scale, particularly how to allocate optical spectrum efficiently and route quantum connections across existing commercial fibre infrastructure without repeaters. It appears to be a useful but relatively small technical step towards eventual metropolitan-area quantum networks, rather than a complete architecture or near-term deployment model.

This appears to be a legitimate but early-stage conceptual paper from an established UNSW professor with substantial experience in quantum communications. However, it is currently an arXiv preprint rather than a peer-reviewed publication, and its numerous typographical and grammatical errors suggest limited editorial scrutiny. The proposal to adapt IPv6 Extension Headers for quantum routing is interesting, but it depends on demanding assumptions such as quantum memory at every router and reliable entanglement distribution. It should therefore be treated as a speculative architectural contribution, not as a validated protocol or deployable design.

The negative result is commercially useful. It implies that quantum links will need instruments, service metrics and operational controls capable of detecting impairments that ordinary optical monitoring cannot see. This could create a new class of quantum-network OSS and assurance systems for topology and resource inventory, path qualification, fault localisation, service-level management and remediation.

IonQ is acquiring considerably more than manufacturing capacity for quantum processors. SkyWater’s foundry and packaging portfolio extends across mixed-signal and RF devices, radiation-hardened and defence semiconductors, MEMS, photonics and advanced packaging. It has also supported satellite and free-space optical communications, including the manufacture of solid-state optical beam-steering chips. These capabilities could support IonQ’s wider ambitions in quantum networking, sensing, security and defence, as well as quantum computing. The acquisition also reflects a broader trend towards vertical integration in strategically important technologies. SpaceX develops custom ASICs and FPGAs for Starlink’s space and ground infrastructure. Rocket Lab brought space-grade compound-semiconductor solar-cell production in-house through SolAero. Hyperscalers including AWS, Google and Microsoft increasingly design their own processors, AI accelerators and infrastructure silicon. Owning more of the technology stack can improve supply security, accelerate design cycles and allow tighter system-level optimisation. However, semiconductor fabrication is capital-intensive and operationally very different from developing quantum systems. IonQ will need to balance its own strategic requirements against SkyWater’s continuing role as a merchant foundry. Vertical integration may strengthen the combined company, but it could also create capital-allocation problems or concern among external customers that IonQ’s internal programmes will receive priority.

Co-packaged optics is becoming important because AI clusters and large datacentres are approaching the power, distance and bandwidth-density limits of electrical interconnects. Moving optical interfaces closer to switches, accelerators and other processors can reduce power per bit and support much higher-capacity connections within and between computing systems.

Near-packaged optics, or NPO, may provide an interim or less-disruptive route. It places the optical engines close to the switching or processing silicon, but not within the same package. This retains more modularity and potentially easier replacement while reducing the length and power consumption of high-speed electrical connections. NPO may therefore suit operators that need better bandwidth density but are reluctant to accept the thermal, reliability and maintenance implications of full CPO.

The opportunity extends beyond hyperscale campuses. Telco edge datacentres and upgraded central offices often face tighter constraints on power, cooling and physical space, while needing high-capacity interconnection between compute, routing and optical-transport systems. NPO and CPO could eventually appear in high-capacity routers, metro aggregation systems, distributed AI infrastructure and some cloud-RAN or edge-compute platforms.

Optical access and ordinary mobile backhaul are less likely to be early markets. Their individual links generally do not yet have the extreme bandwidth-density problem found inside AI clusters, while field replaceability, long equipment lifecycles and cost remain more important. Selective adoption could emerge during the 2030s in very dense OLT platforms, converged edge sites or high-capacity mobile aggregation. Wider use would require major improvements in cost, standardisation, repairability and operational maturity. Pluggable optics will probably remain dominant across most access and backhaul deployments for a considerable time.

Programmable optical delay is an important enabling function for integrated photonic systems. The ability to hold and precisely time optical signals can support synchronisation, scheduling, signal alignment and other control tasks needed in complex optical circuits. This could become a useful building block for communications, sensing and photonic-computing systems. The design remains simulation-led, however, and its practical value will depend on controlling optical loss, manufacturing variation, thermal stability and control overhead.

This is a new experimental type of integrated photonic accelerator, not a general-purpose processor. It is designed to accelerate the matrix and tensor calculations used in AI inference, image and signal processing, and numerical simulation. The researchers demonstrated handwritten-digit recognition and the solution of time-varying partial differential equations.

The use of PZT, or lead zirconate titanate, is important because many programmable photonic circuits need continuous electrical power to maintain their optical settings. This chip’s ferroelectric material retains those settings without constant power while also allowing very rapid reconfiguration. That combination could make photonic accelerators more practical as specialist co-processors in datacentres, edge systems and potentially high-bandwidth optical interfaces.

The headline numbers need careful interpretation. The 16-channel prototype delivered 1.92 TOPS, where one TOPS means one trillion operations per second. The much larger 266 TOPS/mm² figure measures processing density within the active photonic area, not the performance of a complete packaged system. Similarly, near-zero static power applies to retaining the optical settings, not to the lasers, memory, data converters and control electronics required around the chip. It is therefore a promising new component platform rather than a complete commercial accelerator.

The key technical question is whether data already travelling as light can be processed in the optical domain instead of repeatedly being converted into electrical signals. If a small number of logic operations can be performed directly on an optical stream, future systems might reduce conversion delay and energy consumption for selected high-speed tasks. The read-across to telecoms networks is fairly tenuous at this stage.

A microring modulator is a tiny loop of waveguide whose optical transmission can be changed electrically. Cascading these rings creates familiar logic functions such as AND, XOR and XNOR. The researchers used multiple wavelengths to process the two bit positions in parallel and reconfigured the same physical architecture for addition, subtraction or comparison. This is more flexible than a demonstration of one fixed optical gate.

The most plausible destination is a narrow inline processing block rather than an optical CPU. Possible uses could include simple operations on optical data in datacentre interconnects, communications equipment, sensing or imaging systems. The XOR encryption and image-processing examples show that the available logic can be assembled into recognisable tasks, although they are demonstrations rather than complete deployable applications.

The 20 Gbit/s figure is the rate of the input bit stream, not a processor clock speed or evidence that the chip performs general computing at 20 billion instructions per second. The experiment handled only two-bit numbers, not the familiar 8-bit bytes of data. Wider arithmetic requires more wavelengths, rings, optical paths and output handling, increasing loss, noise, thermal-control demands and fabrication sensitivity.

The complete laboratory setup also used a laser, electrical signal generators, thermal tuning, an optical amplifier, a photodetector and digital signal processing. Some final OR operations were performed electronically, and the raw optical outputs needed digital processing to recover clear logic levels. These supporting elements are not captured by the quoted 12.36 femtojoules per bit for the active device.

This is therefore a useful proof point for compact, reconfigurable optical digital logic. Its commercial significance will depend on whether the architecture can scale to wider words and longer sequences of operations while retaining a system-level advantage after lasers, conversion, control and error handling are included.

The attraction is that the design could perform both the linear and nonlinear parts of an AI calculation using light. Many photonic neural networks carry out linear calculations optically but convert signals back into electronics for nonlinear processing. Those repeated optical-electrical-optical conversions can reduce speed and energy advantages.

The proposed module uses a Mach-Zehnder interferometer to split and recombine light, a semiconductor optical amplifier to provide amplification and nonlinear behaviour, and variable optical attenuators to control signal strength. These are established telecom components, which should make a laboratory demonstration easier than an architecture requiring entirely new devices.

If physically realised and scaled, this approach could support specialist high-speed inference or signal-processing tasks. Possible telecom applications might eventually include optical-signal classification, impairment detection, equalisation or other repetitive nonlinear calculations. These uses were not demonstrated in the paper, however.

The current result is still a small simulation based on physics models. A four-module network was tested on classification and a seven-module network on regression, which is far from a useful large AI system. Semiconductor optical amplifiers also consume power and introduce noise. Physical size, optical loss, component variation and the electronics needed to configure the system could outweigh the apparent efficiency benefits. The immediate significance is therefore a more experimentally plausible architecture, not a working photonic neural-network processor.

This is closer to a complete processing system than many photonic-computing demonstrations. The photonic chip is packaged with analog-to-digital and digital-to-analog converters, amplifiers and an FPGA, allowing the researchers to demonstrate a full path, from image compression to reconstruction rather than quoting only the performance of an isolated optical device.

The technique is a form of compressive sensing. Instead of retaining every pixel and then applying a conventional codec, a programmable optical matrix combines the image data into a smaller number of measurements. A lightweight neural network reconstructs an approximate image from those measurements. The researchers tested the system on standard image datasets, an ordinary photograph and a 130-million-pixel aerial image.

The most plausible applications are systems that generate very large images but have limited power, storage or communications capacity. These could include satellites, airborne remote-sensing platforms, drones, medical equipment, industrial cameras and some edge-AI systems. Processing close to the sensor could reduce the amount of data that must be stored or carried over satellite links, mobile backhaul or other constrained networks. Linked to an LLM, it could also point the way towards another form of semantic compression in future.

This is not a universal replacement for JPEG, video codecs or general-purpose compute. Reconstruction is approximate and increasingly lossy at high compression ratios. The quoted 256× result retained enough information for recognisable reconstruction, but its image quality was substantially lower than at modest ratios. Some neural-network operations still run in the FPGA, and the complete system also requires a laser, data converters and control electronics.

Comparisons with an Nvidia RTX 4090 should be treated cautiously. The photonic processor performs a narrow, hardware-matched workload, while the GPU runs larger general-purpose reconstruction models. A comparison with a purpose-built electronic ASIC would be more meaningful. Nevertheless, integrating the optical matrix with the necessary electronics makes this a more credible step towards deployable photonic processing than a device-only benchmark.

It is good to see a more coordinated European approach to neuromorphic computing. The field crosses multiple technical layers, from novel devices and processor architectures to algorithms, development tools and applications. Progress will be limited if each community works in isolation. EuroNMC should improve collaboration, establish more consistent terminology and benchmarks, and make the field more visible to potential users, network vendors, investors and policymakers.

The implications for telecom networks are also becoming more tangible. Ericsson and Forschungszentrum Jülich have separately announced work on advanced AI for 5G evolution and future 6G, using the JUPITER supercomputer and investigating energy-efficient, neuro-inspired computing approaches. The proposed applications include radio-channel estimation and processing for massive-MIMO antenna arrays.

As I noted in my LinkedIn post on the collaboration, these are computationally intensive, time-sensitive network functions that have traditionally favoured specialised ASICs. Adding more AI to the radio network may create a role for neuromorphic or other unconventional accelerators, especially where general-purpose GPUs consume too much power. Possible longer-term applications could include baseband and radio-signal processing, adaptive beamforming, edge inference, anomaly detection and network optimisation.

Neuromorphic systems are unlikely to replace conventional processors across a network. A more plausible model is the use of specialist co-processors for selected workloads where event-driven operation, low latency or low energy consumption provides a genuine advantage.

Coordination alone does not solve Europe’s problems with fabrication, scale-up capital or anchor customers. However, shared benchmarks, closer links across the technology stack and greater external awareness should improve the chances that research progresses into usable platforms. EuroNMC is therefore a positive signal of increasing maturity, rather than merely another research consortium.

The central issue is how much in-memory computing actually reduces the connectivity needed between data storage and compute. By performing calculations where model weights are already stored, IMC can reduce repeated transfers across the short electrical connections linking memory and processors. This may lower latency and energy consumption as memory traffic becomes a larger constraint on AI systems.

However, most of the connectivity being removed is inside a chip, package, circuit board or server. It is questionable how much of this traffic would otherwise travel over a telco network, especially a long-haul connection. Even where storage and compute are disaggregated, much of the traffic remains within a datacentre or campus. IMC should therefore be seen primarily as a semiconductor and system-architecture development, not as a direct threat to operator data traffic.

There could still be indirect network effects. If cameras, industrial systems, gateways and other edge devices can process more data locally, they may send compact results instead of continuous raw streams. That could reduce access or backhaul traffic for some applications. But conventional edge accelerators can have the same effect, so lower network demand is not unique to IMC. Its more distinctive benefits are reduced internal data movement, lower power and faster access to stored model parameters.

Memristors are one of the more promising approaches to IMC. They can store neural-network weights as persistent resistance levels and use the resulting electrical conductance to perform many multiply-and-accumulate operations in parallel. This combines memory and calculation in a dense array and may retain its programmed state without continuous power.

The drawbacks are equally important. Memristor behaviour can vary between cells and change with age, temperature or repeated programming. Analog calculations have limited precision, while data converters, calibration, control logic and error correction can consume much of the energy saved inside the array. Software tools and manufacturing yield also remain less mature than for conventional processors.

This chip is a useful proof point because it is a fabricated system-on-chip running a complete compact model, rather than an isolated memory-cell benchmark. It also addresses depthwise convolution, which is important in lightweight edge models but inefficient on conventional in-memory arrays. This fits my broader argument in my LinkedIn post on microwave analog computing: specialist post-digital hardware may enter low-power edge functions first, while programmability, calibration, testing and monitoring determine whether it survives outside the laboratory.

This is an interesting early example of physical reservoir computing. Instead of digitally simulating every internal connection of a neural network, the system uses the natural interactions among hundreds of particles to transform an incoming signal. Only the final readout needs to be trained.

Reservoir computing has already been explored using optical feedback systems, memristor arrays, magnetic textures, quantum devices and chemical or electrochemical processes. These substrates provide nonlinear behaviour and a fading memory of recent inputs, making them potentially useful for forecasting, anomaly detection and other time-series tasks. The colloidal system adds a genuinely parallel reservoir in which hundreds of particles interact through the liquid rather than relying mainly on repeated time steps through one physical node.

The researchers could tune the coupling and memory by altering the spacing between particles and the damping applied to their motion. That makes the experiment useful not just as a demonstration, but as a platform for studying how memory, nonlinearity and many-body interactions contribute to computation. The successful anomaly-detection result is an interesting proof point for processing complicated signals whose meaning depends on recent history.

Potential applications of physical reservoir computing include industrial monitoring, environmental sensing, physiological signals, radio-spectrum observation and network anomaly detection. The important longer-term possibility is that a reservoir could sit close to a sensor and process a time-varying signal in its native physical domain before forwarding a simpler result.

This particular implementation remains a long way from commercialisation. It requires lasers, imaging, feedback control and carefully prepared microscopic particles, while electronic, photonic, mechanical and magnetic reservoirs offer more obvious routes to integration. The significance of the paper is therefore as an early and flexible research platform, and as evidence that collective liquid dynamics can perform useful computation, rather than as the design of a future commercial processor.

An open question is whether sensing, memory and a small amount of computation can eventually be combined in the same ionic medium. It is also unclear how closely such systems should reflect real biological and neurological processes. Many biological, medical and environmental signals begin as chemical or ionic changes. Processing some of that information before converting it into conventional digital data could simplify certain sensors and reduce their energy or communications requirements.

Memristors are promising for this role because a single element can retain a history of earlier inputs as a change in conductance. The next question is how much memristor systems should mimic actual biological systems like the human brain. Most experimental memristors are solid-state electronic devices. This fluidic version is interesting because information is carried by moving ions and a reversible physical blockage, making its operating principle closer to the ionic signalling used by biological neurons, and the local heating effects they experience.

The most plausible applications will probably be specialist systems that already interact with liquids, chemicals or biological material. These might include medical diagnostics, environmental monitors, laboratory instruments and industrial sensors. A future device could potentially detect a changing signal, retain recent context and identify a simple pattern without sending every raw measurement to a separate processor.

For telecom readers, the relevance is at the connected-sensor boundary rather than in routers, radios or datacentres. If a large population of sensors performs more interpretation locally, some applications may transmit events or compact results instead of continuous raw data. As with other edge-processing technologies, however, the network effect would depend on the application and is not unique to fluidic computing.

The research remains at a very early stage. The array contained 20 elements, switching was tested for only a little over 60 consecutive cycles, the best quoted response time was about 12 milliseconds after repeated training, and stored states faded over periods of up to roughly 1,500 seconds. Temperature, solution chemistry, pore dimensions and contamination could all affect repeatability, manufacturing and operating life.

This is a useful proof point that a nanofluidic component can combine ionic transport, memory and adaptable behaviour. It is a long way from a commercial processor, but it may help establish a route towards unusual sensors and bioelectronic systems that process signals in their native physical domain.

The practical test is whether unconventional analogue hardware can learn using the behaviour of real devices rather than an idealised software model. Manufacturing variation, noise and drift are major obstacles for neuromorphic and analogue processors. A network trained against a perfect digital representation may lose accuracy when its settings are transferred to imperfect physical components.

Training normally requires a gradient: a measure of how a small change in each setting affects the result. The researchers estimate this by applying slightly different inputs to a pair of nominally similar magnetic devices and comparing their outputs. In plain language, the hardware helps measure its own response curve, allowing the training process to adapt to the devices that were actually manufactured.

If the approach scales, it could support small systems that continue learning at the edge rather than sending every example to a cloud datacentre. Possible applications include equipment monitoring, acoustic or vibration analysis, sensor fusion and adaptation to changing local conditions. In telecoms, potential longer-term uses might include interference classification, radio-environment monitoring, ISAC sensing or anomaly detection at individual sites. None of those network functions was demonstrated in this paper, but it will be an interesting field to watch in future.

At this stage, the evidence base is still small. The physical experiment used only five device pairs and the Iris dataset, a standard but simple machine-learning test. The work nevertheless addresses an important deployment issue. Specialist post-digital hardware will be judged not only by theoretical efficiency but by programmability, calibration, testing and monitoring. On-device learning could make hardware variation something the system adapts to, rather than a defect that must be eliminated, although that has not yet been demonstrated at useful scale.

The key question is whether changing a material’s magnetic phase can provide a useful non-volatile state for memory, logic or neuromorphic processing. The large resistance difference is promising, because electronic circuits need to distinguish stored states reliably, while a persistent magnetic state could potentially retain information without needing continuous standby power.

This belongs to the wider field of spintronics. As I explained in my LinkedIn post on the post-digital era, spintronics uses the spin of electrons as well as their electrical charge. That expands the physical mechanisms available for computing and memory beyond conventional transistor switching.

The result is an interesting new device mechanism rather than a complete memory or processor. A sharply switching magnetic element could eventually contribute to non-volatile memory, reconfigurable logic or analog accelerators. If it combined storage and processing, it might also reduce some of the energy spent moving data between separate memory and compute components.

The difficult questions concern the complete device and manufacturing process. The research has not yet established switching speed, energy per operation, endurance over large numbers of cycles, fabrication yield, operation across practical temperature ranges or compatibility with volume semiconductor manufacturing.

Telecom relevance is indirect and long-term. A mature version might appear inside non-volatile memory or specialist low-power accelerators used near radios, sensors or edge systems, but the paper shows no specific advantage for RF or network processing. The appropriate interpretation is a promising addition to the spintronics design space, whose value will depend on whether it can become a repeatable, integrable device.

The commercial issue is whether biology-derived AI can create value without placing living neurons in the deployed product. Using biological experiments to discover algorithms, then delivering the result as conventional software, is a credible way to separate the unusual research method from the operational environment.

This route avoids many of the immediate problems associated with biological hardware, including cell maintenance, contamination, limited lifetime, specialist laboratory skills and integration with datacentres or edge sites. Customers could adopt the optimisation through familiar software and GPU infrastructure, without knowing how to operate a living-neuron system.

Terminology still matters. This is biology-derived AI, not a biological computer running a customer workload, and it does not show that neurons have replaced GPUs. The claim is that observations of real neural activity led to techniques that improve a digital model. The public material does not yet establish how those techniques differ from conventional model compression, fine-tuning or inference optimisation.

This is different to other advanced computing approaches, such as cloud-based quantum compute. For QC, there may still be a familiar cloud platform and APIs, but the actual workload is still done on a real quantum device. On the other hand, it is almost by definition impossible to model quantum algorithms and outputs for use in a classical processor.

In my LinkedIn post on Cortical Labs’ biocomputer, I noted the striking potential energy efficiency of living-neuron systems but questioned their practicality in remote and power-constrained environments. TBC’s software-first approach effectively accepts that operational challenge and uses wetware as a research instrument rather than production infrastructure.

The reported gains are interesting but need independent testing. The company selected the model, benchmark and comparison and has not disclosed enough methodology for outsiders to reproduce the result, or identify which change produced the improvement. A stronger test would compare the approach with leading conventional optimisation methods across several models and workloads.

For telecoms, the near-term relevance is ordinary AI infrastructure, edge processing and media delivery rather than biological networking. If the gains generalise, similar techniques could reduce the compute cost of video, sensing or edge-AI applications and might change how much data is generated or carried. The key commercial question is whether the optimisation is repeatable and broadly useful, not whether it carries a biological label.

The strategic issue is that consent and tissue provenance could become practical supply-chain constraints for biological computing. A technically capable platform may still be unusable commercially if its cell line was collected under terms that did not cover computation, model development, defence applications or commercial resale.

Biological hardware has an origin, lineage and permitted-use history that ordinary silicon does not. In my LinkedIn post on Cortical Labs’ biocomputer, I discussed both the claimed energy efficiency and the difficulty of maintaining living cells in remote or power-constrained environments. Consent adds a separate constraint that cannot be solved through better packaging, cooling or network connectivity. This mirrors many questions around consent emerging more broadly in technology and telecoms sectors, for example around Network APIs and personal data usage such as location information, or emotional and contextual analysis in AI voice applications.

A credible biological-computing service would need records covering donor consent, cell-line provenance, ownership and licensing, permitted applications, jurisdiction, laboratory handling and eventual disposal. This starts to resemble a combination of data governance, model governance and a regulated biological supply chain.

The telecom relevance is low today, but the infrastructure implications would become real if biological computing were offered remotely. Connectivity providers, cloud operators and edge hosts could encounter requirements covering location, sovereignty and the transport of data to and from biological processors. Those controls would sit alongside the operational challenge of keeping living systems stable.

The immediate commercial lesson is to secure appropriate consent and documentation before scaling technical work. Retrofitting consent and provenance after a platform becomes valuable may be slow, legally uncertain or impossible. Governance is therefore not a later compliance exercise; it is part of the platform architecture and investment case from the outset.